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SN74HCS393DYYR

Name: Texas Instruments SN74HCS393DYYR
Brand: Texas Instruments
SKU: 595-SN74HCS393DYYR
Price: 21.75 INR
Availability: InStock

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Mouser No:

595-SN74HCS393DYYR

Mfr. No:

SN74HCS393DYYR

Mfr.:

Texas Instruments

Description:

Counter ICs Dual 4-bit binary co unters

Lifecycle:

New Product:

New from this manufacturer.

Datasheet:

SN74HCS393DYYR Datasheet

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In Stock: 2,770

Stock:: 2,770 Can Dispatch Immediately

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Factory Lead Time:: 18 Weeks Estimated factory production time for quantities greater than shown.

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Pricing (INR)

Qty.	Unit Price	Ext. Price
	₹21.75	₹21.75
	₹15.14	₹151.40
	₹13.40	₹335.00
	₹11.48	₹1,148.00
	₹10.61	₹2,652.50
	₹10.01	₹5,005.00
	₹9.57	₹9,570.00
Full Reel (Order in multiples of 3000)
	₹8.96	₹26,880.00
	₹8.70	₹52,200.00

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Texas Instruments
Product Category:	Counter ICs
RoHS:
Mounting Style:	SMD/SMT
Package/Case:	SOT-23-THIN-14
Counter Type:	Binary
Number of Bits:	4 bit
Counting Method:	Asynchronous
Counting Sequence:	Up
Operating Supply Voltage:	5 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 125 C
Series:	SN74HC393
Packaging:	Reel
Packaging:	Cut Tape
Brand:	Texas Instruments
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	PH
Maximum Frequency:	28 MHz
Product Type:	Counter ICs
Factory Pack Quantity:	3000
Subcategory:	Counter ICs

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Datasheet

SN74HCS393DYYR Datasheet

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CNHTS:: 8542399000
USHTS:: 8542390090
MXHTS:: 8542399999
ECCN:: EAR99

SN74HC393/SN74HCS393 Dual 4-Bit Binary Counters

Texas Instruments SN74HC393/SN74HCS393 Dual 4-Bit Binary Counters contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices comprise two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK) input. N-bit binary counters can be implemented with each package, providing the capability of dividing by 256. The Texas Instruments SN74HC393/SN74HCS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals.